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Thread: How can any TB6560 driver design NOT violate the chips spec's?

  1. #49
    Registered doorknob's Avatar
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    My interpretation is that at a gross level the power dissipation calculation depends on the current through the output stage and the "on" resistance of the motor driver, independent of the voltage at which it is being driven, and independent of the heat sink. (The other factors that neilw20 mentioned are presumably operating as well.) Based on that calculation, the heat sink requirements can be estimated from the graphs.

    But then I'm not an EE, just an annoying hobbyist, so YMMV...


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    Quote Originally Posted by James Newton View Post
    So these things are really designed for 1 amp at 24 volts or maybe 2 amps at 12 volts WITH a reasonable heatsink. Half an amp at 40 volts.
    Voltage doesn't affect the chip's power dissipation much. It's a pwm driver. It will handle 3.5 amps peak, which is equal to 2.45 amps RMS per coil.


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    Quote Originally Posted by H500 View Post
    Doorknob, I think their equation is wrong. Ignoring switching losses, the heat produced by the chip can be estimated as 2 x .5 ohm x 3.5amp x 3.5 amp x .7 = 8.5w
    I would say it is a little presumptuous for jumping into that conclusion.

    It is what it is, an equation to estimate the chip's PD, I would say. Don't stomping down too much onto an empirical formula provided in a spec sheet.

    htrantx


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    Quote Originally Posted by htrantx View Post
    I would say it is a little presumptuous for jumping into that conclusion.

    It is what it is, an equation to estimate the chip's PD, I would say. Don't stomping down too much onto an empirical formula provided in a spec sheet.

    htrantx
    What makes you accept it without question, other than the fact that it's written in the datasheet? Power is normally equal to I^2 *R.


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    Registered htrantx's Avatar
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    H500, you were right.

    The equation in 11/13/2007 datasheet was a typo, and the spec was updated 03/24/09 and it is:

    for 2-phase excitation:

    P = VDD × IDD + (Ron(U + L) × Io × Io) × 2
    Last edited by htrantx; 04-12-2012 at 08:13 PM. Reason: correcting errors


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    I simply glossed over the second X Iout.

    But you're still placing too much faith in supposed authorities.


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    The "2 x .5 ohm x 3.5amp x 3.5 amp x .7" from the datasheet is a simplification of the "Rds ON" losses, which is one of the switching losses of a switchmode driver;
    2 (two phases in a motor)
    0.5 ohm (Rds ON resistance of the switching FETs)
    3.5amp x3.5amp (current squared)
    0.7 (average current in one sine driving "phase")

    However this does not include the dynamic switching losses, these can often be as high as the static Rds ON losses. The dynamic losses are because the IC does not switch instantly from OFF to ON, it can take a microsecond or more which adds up a lot when
    the IC is chopping at 20 to 50kHz.

    Also, the Rds ON value of 0.5 ohm is likely to be optimistic and will rise a LOT if the chip is hot, ie under heatsunk. I think 0.5 ohm sounds very optimistic for a bipolar driver (where current must go through 2 FETs and their skinny little SMD power leads).

    Don't be surprised if that "8.5W" ends up being quite a bit more...


  • #56
    Registered doorknob's Avatar
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    Quote Originally Posted by RomanLini View Post

    However this does not include the dynamic switching losses, these can often be as high as the static Rds ON losses. The dynamic losses are because the IC does not switch instantly from OFF to ON, it can take a microsecond or more which adds up a lot when
    the IC is chopping at 20 to 50kHz.
    But, assuming that the dynamic switching losses are comparable in magnitude to the static Rds ON losses, wouldn't the fact that those two losses do not overlap in time, but rather at any instant in time the switch is effectively operating in one regime or the other, mean that the average power dissipation might indeed still be comparable to the calculation of the static Rds ON losses?

    (that assumes that the dynamic switching losses would be constant over the duration when they occurred, which might not be a defensible simplification, but then maybe the net result would be less, not more, than the Rds ON loss value, depending on the behavior of the dynamic losses with respect to time)
    Last edited by doorknob; 04-13-2012 at 02:26 PM. Reason: removed a comma


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    Romanlini, I would not expect switching losses to be that high at 20khz. Modern switching regulars commonly go up to the megahertzs. The datasheet didn't list switching losses as being significant.

    Doorknob, heat is dissipated slowly. The microseconds of time difference won't make a difference.


  • #58
    Registered doorknob's Avatar
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    Quote Originally Posted by H500 View Post

    Doorknob, heat is dissipated slowly. The microseconds of time difference won't make a difference.
    Yes, but that is a different issue from determining the average electrical power dissipated in the chip.

    For example, if there were instantaneous on/off switching with a 50% duty cycle, the average power dissipated in the chip would be different from a 25% duty cycle or a 75% duty cycle.


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    The current waveform is sinusoidal when the motor is turning. This waveform is generated by the duty cycle of the FET. This is made possible because the motor inductance prevents the current from changing instantly.

    The bottom line is that the power dissipated by each fet is proportional to the current squared.


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    So after reading all this stuff on the TB6560.. Is the simplest solution to cut the traces from the main power input and run a sep 5V supply to the logic and just make sure to power on the 5v first and power the 5v off last..I am talking about the 5 axis TB6560 ..blue ebay boards


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