TinyCPLD

[archcomp]

Dear Friends,
I have not seen any activity on this thread since a few days..Is it because people are not interested or due to festive seazon? I will like to register for 10 Nos. of chips for a trial. Mr. Mariss, please revive the thread and let us know the status of the chips.
Regards,
Mahesh Vyas.

[Asterox]

Mariss:

What is the big difference between controlling the current with PWM vs. Chopper? As the comparators only know if current (voltage) is higher or lower than A-sin or B-sin would the duty-time of PWM be just 100% or 0% , thats like chopper in my mind.

[Helmute2000]

Hi Mariss,

yes you are right, but tell us were is the difference? Did you design a controller in the CPLD, which controls the current average value (PI controller)?

If yes, the controlled current depends only on the quality and accurateness from the CPLD controller components, no more from external boundary conditions.

Is that right?

Br,
Helmut

[Ch_Irawan]

What is the big difference between controlling the current with PWM vs. Chopper?

Me too asking for this.

What i can think of them:

Chopper:
- the bridge turned on
- the voltage at current sense resistor compared with a sine rev voltage.
- when the voltage reach the limit then the comparator turn off the bridge via a kind of flip-flop mechanism.
- the bridge keep turned off until some predefined t time
- the cycle repeat.
- the waveform will be a Pulse Width Modulated too (confusing?)

PWM:
- the controller feed the bridge with a PWM signal
- comparator monitor the current via sense resistor
- when the current reach the sine v ref then the controller reduce the duty cycle of the PWM
- need a kind of algorithm to accelerate the steady state current without (minimal) overshoot (PID?)


-ichan

[Mariss Freimanis]

Chopper sequence:

1) Cause current to increase in winding.
2) Has current reached reference? If no, go to (1).
3) Cause current to decrease in winding.
4) Wait 20uS, then go to (1).

PWM sequence:

1) 20kHz CLK causes current to increase in winding.
2) Has current reached reference? If no, go to (1).
3) Cause current to decrease for the remainder of cycle.
4) Go to (1).


The Chopper and the PWM seem very similar but they are not. The Chopper frequency is variable (20%) and depends on motor phase current. At zero current (sine = 0 degrees), the "on" time is 20uS and the "off" time is 20uS for a period of 40uS or 25kHz. At max current (sine = 90 degrees), "on" time is 30uS, "off" time is still 20us for a period of 50uS or 20kHz.

Choppers wouldn't make a sound if step motors had only a single coil. The problem is a step motor has 2 coils, which require 2 choppers, which then make / break phase-lock and produce the familiar racket. Two variable frequency free-running oscillators do that.:-)

Two PWM circuits are required for two step motor coils. The difference is both circuits are clocked simultaneously by a common oscillator (20kHz). Both PWM circuits run at the same fixed frequency even though the PWM duty cycle is variable. No audible noise is created.

Mariss

[dandumit]

Mariss,

Thank you again for your explanatory post.
Since the working frequency it is pretty slow and you don't have yet clear plans for your a3986 CPLD replacement, I would like to take my chances to use one atmega8 to drive the fet's. It has comparators inside of it and even hardware pwm's.
What do you think about this approach ?

Daniel

[Ch_Irawan]

Thanks for the explanation.

4) Wait 20uS, then go to (1).

This is fixed t-off approach, but there is variable t-off approach which is if i understand it properly the frequency will be constant (?)

1) 20kHz CLK causes current to increase in winding.

How to decide what duty cycle on the start of each cycle?

-ichan

PS: Mariss, I have a bridge schematic on this thread Drive for Siemens 1.8KW DC Servo motor, i hope you willing to give some feedback.

[H.O]

Mariss,
I admit, I'm a bit confused....
I get the difference when you describe it like that, ie constant off-time. But looking at the L297 for example it doesn't make sense to me.

The output of a single oscillator sets the two flip-flops which causes the current in both windings to increase. When current has reached the setpoint the output of the comparator for that winding resets its flip-flop and the current starts to decay untill the next cycle. This clearly sounds as constant frequency PWM to me yet it's described as a chopper in the datasheet. The drives I've used based on the L297 has been anything but silent. - Which is basically why I'm confused.

The Allegro A3977 on the other hand cleary states that is uses fixed off-time so it makes a lot more sense in that case.

Thanks!
/Henrik.

[kreutz]

There are three kind of choppers: "Fixed frequency" choppers, "Hysteresis" choppers and "Fixed off time" choppers, the later is the one described by Mariss as a "chopper", while the former is described (by him) as PWM.

Examples of commercial "Fixed frequency" choppers are: L297, L6506, etc
Examples of commercial "Fixed off time" choppers: most of the Allegro family of stepper drive chips.

All "choppers" are theoretically PWM controllers, even when in some of them the switching frequency is variable.

[Mariss Freimanis]

Here's why the L297/298 makes a racket and the TinyCPLD is silent:

The increasing current slope is Volts divided by Inductance. Volts is the supply voltage - motor rated voltage - transistor voltage. The decreasing current slope is the supply voltage + motor rated voltage + diode voltage, all divided by Inductance. This means the increasing current slope is always shallower than the decreasing slope.

1) L297/298. The red trace is the motor current and the black time ticks are the 20kHz oscillator clock pulses. The current is made to increase at every clock tick. It increases until it reaches the horizontal red line (current reference) when it is made to decrease until the next clock tick. The increasing current slope is '+1', the decreasing current slope is '-1.5'. Notice the unstable current waveform. This waveform has frequency components that sound like hissing and squealing.

2)TinyCPLD. The blue trace is the motor current. The TinyCPLD circuit generates a compensation signal that is summed with the current sense feedback to artificially make the increasing current slope (+1.5) steeper than the decreasing current slope (-1). Note how the waveform is utterly stable with no period to period variations. The lowest frequency component is an inaudible 20kHz.

Mariss

[Helmute2000]

Mariss,

Thank you again for your explanatory post.
Since the working frequency it is pretty slow and you don't have yet clear plans for your a3986 CPLD replacement, I would like to take my chances to use one atmega8 to drive the fet's. It has comparators inside of it and even hardware pwm's.
What do you think about this approach ?

Daniel

Hi Daniel,

some thoughts to avoid running into a wrong direction using Atmega8 in here.

I learned that Atmel didn't implement an emergency PWM shutdown input. So you have to implement this functionality in software via comparator interrupt.

You have only one comparator and you have at first to decide from which PWM channel your interrupt comes. Let say you need 2 x 4 cycles for interrupt service routine afterwards you have to implement the context switching mechanism let say 20 cycles and you have to take into account that both PWM channels could interrupt the CPU in the same time point. Or nearly the same...

So we have here to calculate a worst case delay from 1.4usec. ((8 + 20) x 2 x 1/20MHz) (+ step routine cycles?)

Please take also into account, different interrupt levels for the step input, watchdog and the comparator. The step input can also change during a PWM channel shutdown. I mean, not so easy to predict the behaviour in that case.

If you are not fast enough to disable the PWM channel within a time limitation let say < 5usec your HBridge MOSFET's will die.

So it could be very dangerous to implement that important function in software. Please refer also to Mardus Kreutz, unipolar motor microstepping, you will find in that design an external Latch to avoid that problem. Please refer also to Mariss suggestion, you will not have such problems in CPLD's, because you can implement a LATCH with a reaction time under <15 nsec.

If you implement that topic in hardware, no problem at all, but you need a lot of more components.

Maybe you can use also a L6506 in that case to avoid to much comonents?

Br,
Helmut

[kreutz]

......................
Maybe you can use also a L6506 in that case to avoid to much comonents?

Br,
Helmut

L6506 is one of the fixed frequency choppers that has the same problem with subharmonic instability that Mariss is talking about.

On the Mardus-Kreutz and K-4 drives I used a fixed frequency chopper, on the M_K there is no noise at all, the blanking time and sense voltage filtering takes care of it. On the K-4 SMD bipolar drives I used a similar (but non-linear) slope compensation technique. No noise either. I thought I was one of the few who use slope compensation for stepper current regulation, I see that I am not alone

Best regards,

Kreutz.