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#1
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Ok...I'm editing post, as I got them to turn. However, they wont reverse. I thought for a minute, maybe it's because I've got low state enabled when it should be high state, so I swapped. Now it turns the other way, but not the original way. So.... I'm confused... BTW, this is a compaq computer putting out 3.4 volts at the parallel port. Gecko 201's. I am using turbocnc right now. -Jacob Last edited by snoman70; 03-29-2005 at 09:25 PM. |
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#4
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| I put a SIIG Cyber Parallel Port card in my Compac to push Gecko 320s. Industrial Hobbies said the card was good for 5 volts and it works here. When I bought it last fall it was going for $5 to $20 on Ebay, $65 at Staples. The one I Ebayed was an older one with drivers on a floppy, but Windows XP found it and played nicely sans need for loading the older driver. |
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#5
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| Snoman, The 3.4V isn't a problem, wire the gecko to use the sink side of the parallel port. i.e. +5V to gecko +5V, dir and step to the appropriate pins on the parallel port. The real question is can your parallel port when told to go to 0, sink the current supplied by the Gecko opto isolator. If it can't instead of reading .7V or lower, you'll read 1.X volts or higher. You see when the parallel port is putting out 3.4V (fairly typical in the high state) the optoisolator led is not conducting (dark, no light), when the parallel port goes low it's acting as a switch to common and attempting to illuminate the led (no it's not visable). Phil
__________________ Phil, Still too many interests, too many projects, and not enough time!!!!!!!! Vist my websites - http://pminmo.com & http://millpcbs.com |
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#6
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| The 3.4V IS the problem. New PCs use 3.3V logic instead of 5V which prevents the drive from operating properly. You will either have to: 1) Use a buffered breakout board like what Campbell Designs sells. 2) Buffer the outputs yourself. If you do, use the 74ACT series logic ICs. They have a 1.5V input threshold and output a 5V swing at +/-24mA sink and source current. Do not use any other series (74LS, 74HC, etc.) logic ICs. Mariss |
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#7
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| Mariss, I'm confused, your 201 manual indicates it needs to sink 16ma. Standard ttl has a guaranteed min output of 2.4V with a typical of 3.4. From your manual: ???? Phil
__________________ Phil, Still too many interests, too many projects, and not enough time!!!!!!!! Vist my websites - http://pminmo.com & http://millpcbs.com |
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#8
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| Right spec, wrong application. The 2.4V min, 3.4V typ output is the voltage a TTL output will rise to when it is not sinking current (logic "1" state). It can be pulled up to 5VDC without sinking any current at all. 3.3V logic will have a 3.3V output when not sinking current. Any attempt to pull the output above 3.3V will cause current to flow into the output because it is clamped to an internal 3.3V power supply in the PC. This is exactly what happens when a pull-up load tied to 5V is connected. The LED anodes (COMMON terminal)connect to +5V and the cathodes have 200 Ohm current limit resistors. Allow 1.2V for the LED Vfwd at low currents; that leaves 0.5V (5V -1.2V -3.3V) across the 200 Ohm limit resistor. That makes the LED current 2.5mA (2.5mA = 0.5V / 200 Ohms) when it should be zero. The opto LED never fully turns off and leaves the input non-functioning or exposed to noise if it does happen to cross the logic threshold for that particular opto-isolator. The LED current would be zero if the COMMON is driven with 3.3V instead of 5V. However the LED current will be only 7.75mA (7.75mA = (3.3V -1.5V Vfwd -0.25V Vol) / 200 Ohms). This is less than 1/2 the design current. The other problem is 3.3VDC is not available on any common PC connector. The only practical solution is to level-shift the output from 3.3V to 5V. This will all become moot anyway once parallel ports disappear altogether in a year or so on new PCs. Mariss |
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#9
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| I can't disagree with anything you have said. I assumed you would have allowed for that in the design, but then again transconductance spces do vary measurably. My mistake, sorry. Isn't my first, won't be my last (and I'm just talking about today) Phil
__________________ Phil, Still too many interests, too many projects, and not enough time!!!!!!!! Vist my websites - http://pminmo.com & http://millpcbs.com |
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#10
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| Jeez, you should see the mistakes I can rack up in a day. :-) We spec the interface at 16mA but our in-house must-operate limit is 8mA. This allows for ageing degradation all infrared LEDs have. The controlling spec is the HCPL2531 opto min gain of 0.19 mA/mA. It is a fast and cheap dual opto but its gain is miserable. The collector load is 1.5mA, so 7.9mA of LED current is necessary to just take it into saturation. Mariss |
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#11
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| Mariss, Maybe you can answer a question for me. The prop delay on most of the cheap opto spec can vary so much, my concern has always been relationship between step and direction signals. Do the duals hold true to each channel? i.e. you don't wind up with a part that has .5us one channel the next 3us? Phil
__________________ Phil, Still too many interests, too many projects, and not enough time!!!!!!!! Vist my websites - http://pminmo.com & http://millpcbs.com |
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#12
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| I measure less than 100nS of skew on saturating edge of the dual optos if the collector loads are identical. Keep in mind there is no base to emitter path (resistor) to sweep out the minority charge carriers which makes the storage delay times rather long (2 to 3 uS) for a transistor with an Ft of over 1GHz. The "on" delay is about 300nS though. Things get much better if you operate it in a cascode circuit because that eliminates the Miller effect. The "off" delay can then be under 500nS. Mariss |
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