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Old 05-09-2009, 03:44 PM
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CPLD sizing

I'm a beginner. I have recently discovered CPLDs. I'd like some sort of feel on the capacities of CPLDs as well as the preferred brands and experimentation boards.

I see some CPLDs have 32 macrocells. What can you do with a macrocell?

My lame little circuit would need the equivalent of probably 90 basic gates and an 11 bit counter or so. And a PLL which might have to be external.

Is there any reason to use a CPLD when FPGAs are common?
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Old 05-09-2009, 11:16 PM
 
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cpld selection

Mariss loves the coolrunner II, a very nice chip however he writes very compact code and wastes nothing, you may need a few more macrocells. 64 should give you plenty. He is doing a verilog tutorial. You may also want to check out the cypress PSoC, analog and digital blocks plus a microprocessor on the same cheap chip, plus they have a good stepper reference design. If you can manage sine cos via pwm, midband resonence correction,, low speed morphing, and quiet synchronous pwm operation then go for it; but it will be far simpler to just buy a gecko. If you know nothing about steppers be prepared for a steep learning curve, same for the cpld.
Amplexus
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Old 05-10-2009, 08:58 AM
 
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Amplexus

You seem to really jump to conclusions. Tony never said he was making a stepper drive. Even if he were, he probably knows it would be "easier" to just buy the end product. The fun is in the journey, not the destination. Next you will be telling everyone on the site they should just buy a CNC machine because it is simpler than building one?

Tony

I have never used a CPLD so I can't offer too much useful help. As amplexus hints at, a Gecko G250 uses a 32 macrocell Coolrunner II, but Mariss has optimized the heck out of it so it will fit. There are a few guys playing around with CPLD stuff over here, maybe that would be a better place for your question to be answered.

Using a CPLD to replace a few CMOS gates

Matt
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Old 05-10-2009, 09:19 AM
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Keebler, that tremendous thread is how I found this forum to begin with. I don't want to junk it up with this question.

Amp is correct in that I desire to annoy a stepper motor. That's why were all here, I think.

My project is the ubiquitous 'virtual quick change gearbox' for my ancient featureless lathe. I went through numerous ideas about buying or building a real QCGB but rejected them all due to cost or likelihood of failure. Remarkably (to me) an electronic leadscrew (I bet you CNC guys are soooo sick of hearing that phrase) was far less expensive. My particular project should be thought of as 'electronic assist' since really. I'm just multiplying spindle pulses and feeding these into a stepper. There are over 50 different ratio settings, however. But it's all just basic math and I have that worked out.

But Keebler is correct in that it is the journey - I want to learn. And there's some humor in the idea of using a CPLD or FPGA to drive the leadscrew on a lathe that's older than my father.

Other goals are:
1. No external computer in the shop
2. No LCD monitors
3. No programming instead of machining.
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Old 05-10-2009, 11:20 AM
 
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A 32 macrocell CPLD will probably work, but why start out with your pants too tight? Check this puppy out. 64 macrocell Coolrunner II, cheap, nice for jamming into a breadboard or a perfboard. That's where I'd start. You'll also need a JTAG programmer for loading your code into the flash, which Digilent also carries.

De-cloak: I work as an applications engineer for Cypress, and know more than a bit about the PSoC as I use it every day. I also used to support their CPLD line before it was de-emphasized. PSoC certainly would work well for your electronic leadscrew, and it would be pretty trivial to have a 7-segment LED or character LCD display to show what TPI you're running. I don't think "PSoC Express" would get you there, so you'd have to learn the tool and do some C or ASM programming.
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Old 05-10-2009, 02:28 PM
 
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Dielectric is right a psoc may be overkill but it is fairly cheap as is the 64 macrocell coolrunner. I am playing around with both of them and hope to eventually have a good stepper controller, I agree that this is great fun and would urge you to try your hand at a design, even if it fails you will learn a lot. if your circuit does what you want it is not lame, not to say it can't be improved on but if it works it works.
If you already know verilog or c that may influence the decision. I know some c and am learning verilog. I lean towards the psoc since I know some c, I like the mix of analog and digital blocks and I also like the cypress tools, psoc express is super easy to use and you can always tweak a basic design with the full toolset. Do you have any experience with conventional circuit design either analog or digital? I am still not clear exactly what you want to do, can you send me your schematic or at least a general outline of what you want, if it is just a counter and a display there are many single chip solutions that would do it easier and cheaper. but that dosn't account for 90 gates and a pll.

Our oldest son married the daughter of Steve Kaplan, one of the cypress co founders so I have an in for some extra help. If you want to learn read all of Maris’s posts, he is very generous with information and his knowledge of steppers is incredible. I warn you steppers easily turn into an obsession, they are much more complex and subtle than most people think. There is an abundance of crappy chopper chips out there that annoy me and some like allegro won't fix their flaws even when they are pointed out. None even comes close to the gecko drives .
Amplexux
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Old 05-10-2009, 04:49 PM
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Thanks amplexus. By the way, what does 'amplexus' mean? You have piqued my curiosity.:-)

I'm putting together a 4-microstep PMW (not chopper) step motor drive Verilog tutorial. It will use the Xylinx XC2C32A and I think it will be fun. It will cover most of the I/O features I really like about the CoolRunnerII series CPLD.

As you can guess, this takes time to prepare the design, draw the graphics and most important, make sure the miserable thing actually works. Writing the CPLD code is a breeze by comparison. I'm thinking a week or so before I'm ready.

Right now I'm diverted by chasing a new idea; I think I may have the handle on how to keep a step motor cool at any speed and supply voltage. Motor heating becomes a function of motor load only. Just like a servomotor but without the encoders. This takes precedence on my time.

What I propose is at the end of the tutorial, you will have a perfectly functional (and audibly silent) microstep drive controller. You will see there is no need to use PICs or Allegros or any other off-the-shelf controllers when you can roll-your-own using a $1 CPLD.

I'm not picking on PICs and the like. It's just that they are the wrong tool for what's required. A microprocessor is a sequential machine. It executes something called 'instructions' in a sequential A, then B, then C fashion. Much better is to do what's required in a completely parallel fashion. In other words, a bag of interconnected logic gates, D-Flops and counters. Sequential instructions have no meaning in this context.

You will do best if you don't have a strong microprocessor programming background. You will do best if you are comfortable with logic design, Karnough maps, timing diagrams and the like.

As soon as I get my stuff together, I will start a new thread in the Geckodrive forum called "CPLD tutorial". It will start at zero and move on from there, just like I did.:-)

Mariss
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Old 05-10-2009, 06:11 PM
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What I am trying to do here, specifically, is to implement the digital equivalent of a lathe's quick change gearbox.

I program computers for a living and am not intimidated by any programming language. Or timing diagrams. Or state machines.

My EE design experience is nil though I kinda know the basics, charitably. Maybe. I did build a tube amp with a substantial assist from a savvy friend. What has me intimidated are things like pulldown resistors and the weird little capacitors all over these boards. :-D No, really.

Because I am a contrarian, my QCGB isn't normal. I intend to implement a functionally faithful copy of the type of QCGB common to my lathe. This is illogical as it is less flexible and probably more complex, but it amuses me.

To implement a 'virtual QCGB', nothing more is needed than multiplying the frequency of a low-Hz pulse by a fraction. The difficulty is that there are 60+ different fractions and they are selectable on the fly. I worked the logic out using 74x-family gates and counters, then I did it again as though I was using an EPROM instead, for fun. And the former is why I want to know how many common gates I should be able to get out of a CPLD's macrocell. Figuring out the rest - he real-world electronics - is the challenge. I don't want to post too many details because the pros here will solve my problem for me, probably in about 10 seconds, and at that point I may as well just buy the whole thing. I just want to be sure I have the right technology.

The next step is tickling a stepper so it steps. I have seen a few circuits for that - they are super simple. I bet they make Mariss see red :-D
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Old 05-10-2009, 10:21 PM
 
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what is amplexus

I have stumped Mariss, just when I thought he knew everything. Amplexus is a duality, both Robert Stewart and my 15 year old son Ender post under this name. Ender sort of lives up to his namesake. He started teaching himself c at 8 or 9 and did the MIT freshman physics class online two years ago. I have been a hardware hacker since the 1960's but have a degree in biology. Herps have been a lifetime love and at one time I bred a number of geckos and nearly every other herp you can think of. Currently I am trying to pass on my few design skills to Ender before I croak. I have stage 4 colon cancer but with luck I may be one of the few that survive it.
As to Amplexus it is what passes for sex among the anurans (frogs and toads) geckos have two hemipenes but frogs have none which makes sex a bit more tricky. No wonder gecko drives are so kick ass and mine lack performance.
I can't express sufficient thanks for all your posts, Ender and I are actually starting to understand steppers, you provide great information and leave puzzles that beg to be solved, The cool stepper is a great example, it is indeed cool in more ways than one and Ender and I will spend weeks trying to figure out how you did it. The stepper/servo is another that begs understanding. Strange as it sounds I actually dream about stepper designs.
Amplexus (Bob)

ps.
I understand Bob Pease is looking for a new job, National has set a new standard for corporate stupidity.
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Old 05-12-2009, 08:07 PM
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Would I be sorry if I bought this Coolrunner II development/starter/evaluation kit?

I realize that it's going to work. But if it is unlike what is commonly used here, it could be a suboptimal choice.

What else would I need to get started? I think I have a soldering iron...

Last edited by tony ennis; 05-12-2009 at 10:31 PM.
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Old 05-12-2009, 09:38 PM
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Good find and it's great! It's the exact same model we purchased for every technical type here at Geckodrive. Xilinx was running a special on them about 6 months ago at $29 so we bought 10 and passed them out.

The first thing I would do though is take apart that wretched USB cable thingy. Unscrew the one screw holding it together and toss the spring and plastic cover. What's left is a perfectly good, normal 6' (2m) USB cable. That's what I did. The spring retractable cable is irritating beyond all belief.

Put away all the supplied CDs (DVDs?) except for the ISE 10.1 disk. That's the one you want to install.

Since this development kit is the one we have here and it seems they are still available from Digikey, I'll be using it as the target for the microstep drive CPLD tutorial. I would urge everyone wishing to participate to get this model number development system. That way we'll all be on the same page.

The XC2C128 CPLD is far bigger (and more expensive) than necessary for what I have in mind. The idea is to fit a drive in a $1 32-macrocell device. The big guy has features the little $1 part doesn't (data gate, clock dividers, dual-edge clock D-Flops and counters) so I will ignore them.

The only 'hack' to the kit board will be to generate an RC oscillator 5MHz clock. Crystal oscillators are needlessly expensive when there is a $0.02 (one R, one C) solution. The on-board choices are 100kHz, 1MHz and 10MHz; none of which are what is needed. The hack will be non-destructive and I will post close-up pictures detailing it.

The on-board I/O connectors marked J1 and J2 will be used for all I/O. We will simulate the XC2C32A. The XC2C32A has 19 I/O lines and not all will be used.

I have thought some more about the tutorial project. It will now be a 5-microstep drive. This is to get away from a 2^n resolution drive which a 4 microstep drive would have been. Second, the motor feedback loop will be a silent feed-forward compensated PWM design because I cannot stomach designing a chopper-type drive. The squealing, hissing and whistling is just too nauseating.:-)

The drive will be loosely based on our G250 drive. Sadly, I will keep out the mid-band compensation and full-step morphing portion. I hope everyone understands the the reason for that.

Approach: CPLDs replace discrete logic. The design approach will from a logic designer's point of view. What has to go into a CPLD will be drawn-up as as a standard logic diagram. Timing diagrams, truth tables and Karnough maps will be used where necessary. The result will be a circuit using AND gates, XOR gates, OR gates and the like, also D-Flops and UD counters. You will have to be conversant in logic design because that is what will be translated into Verilog. For those that are, think of it as having a bag of 100 7400-series logic IC packages except you can design parts that never existed. Need a 17-input AND gate with 9 inverting inputs? No problem.

If you are a crappy logic designer, you will get crappy Verilog code. It will work but it will be less than optimal (will take up more resources than necessary) in many cases. Verilog does an excellent job in reducing logic terms but it can only go so far. If you are a good logic designer then the Verilog code will be tight and an unexpectedly lot of functionality will fit into the device.

The tutorial will consist of laying out a design goal (building a 5-microstep drive) and go through the process of turning the goal into a first-cut logic diagram. Various options will then be considered as to how the necessary logic can be minimized. It will involve trade-offs between placing the burden on the CPLD or moving part of the burden on external analog circuitry. Both will be examined to arrive at an optimal solution. The CoolRunnerII is particularly adept here because of its very "analog friendly" I/O. What I hope to show is how this "analog friendly" I/O makes this shifting choices easy and effective. The end result melds analog and digital to produce an optimally cost effective solution.

I will supply the external circuitry schematics necessary to build what frankly will be a commercially viable motor drive. It's performance will exceed any L297/L298 or Allegro based design.

Some of you will build the actual drive for personal use, fewer yet will try to manufacture and market the result. That's fine with me. My mindset is such that I cannot design anything that cannot be successfully put to use. All I ask is:

a) Attribute the design.
b) Do not copy my pcb layout artwork.

Most of you will probably just enjoy compiling the code and watch it run in simulation and that will be it. Some of you will smack your forehead and say "It's not a CPU but darn, this Verilog thing and a CPLD is just what I've needed for a part of this project I have been thinking about!" I hope to convert a few "the CPU is the solution to everything" die-hards here.:-)

We'll try to start next week on the yet to be formed "CPLD tutorial" thread. I'd like it to be the only thread on the subject otherwise things get scattered-out all over the place and I can't keep track. Any questions or suggestions?

Summary: Get the development kit from Digikey the link in message #10.

Mariss

Last edited by Mariss Freimanis; 05-12-2009 at 10:25 PM. Reason: Had more to add
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Old 05-12-2009, 09:47 PM
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Cool. The Digikey link says the CPLD is a XC2C256-TQ144, not a 128, if that matters. More gatey goodness...

This chip doesn't have a "speed rating" in its ID, for whatever reason. Perhaps it is gimped somehow?

If it matters, I am so not going commercial. That's like real work.
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