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#1
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Is it possible to use a CPLD to replace just a few CMOS 4000 series logic gates? Lets say that I wanted to use a Xilinx XC2C32A (cost $1.15) to replace 3 cmos gates that cost $1.20 but it allowed me to fit it all on a much smaller board. Would it make sense? Alan
__________________ http://www.alansmachineworks.com |
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#2
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| This used to be traditionally done with PLD's when 'simple' custom logic was needed, I am not sure whether it is still popular. This is obviously when you do not need processing power. Al.
__________________ CNC, Mechatronics Integration and Machine Design. “Logic will get you from A to B. Imagination will take you everywhere.” Albert E. |
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#4
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| Mariss, I downloaded the Xilinx webpak, created a project, and a schematic. Then I compiled the project and it went through without error. ![]() So did you build your own JTAG programmer or did you buy one? How does one get from the compiled project to a loaded CPLD? I assume that it is a good idea to put in circuit programming pads on the board? Alan
__________________ http://www.alansmachineworks.com |
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#5
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| Alan, Quick as a bunny, dump schematic entry and immediately go to learning Verilog. Schematic entry is in my opinion a sideshow Carney trick. It wows you at the start but like any trick you very quickly learn its limitations. I hate programming, I hate programming languages but I love Verilog. Avoid VHDL; it's for programmers that love programming languages; don't mess with VHDL, don't mess with schematic entry (designed for rubes just getting into CPLDs). Go straight to Verilog. All you need to learn in Verilog is "assign", "wire" and "behavioral" (if, then, else) for counter, D-Flop and other primitives. Simple as dirt. About programming a target device. I use a parallel-port cable that cost $15. We have USB programmers at work to program G203Vs and G250/G251s. They can be a PIA. A parallel port cable never is. If you do a board, pull out to pads TMS, TDI, TDO and TCK. Include VCCIO and GND. I have on my lab cable a pair of AAA 1.5V cells connected in series and attached to the VCCIO and GND pins. The programming head is 6 pogo-pins that match the board programming pad spacing. The AAA battery provides the power to the CPLD and its 1.8V regulator. Get a parallel port JTAG cable (<$15). This way you can take a 'cold' board (no power supply attached), snick on the programming head and JTAG the board. Go to IMPACT, select your .jed file, pick "read protect" in IMPACT if you want to keep the contents protected and select "program". Bing boom bang, 2 seconds later and you are done. If you have any of our G250 or G203V drives, look for 6 thru-hole pads arraigned in an array. Those are the programming head target pads. About Verilog. I cannot stress it enough. Dump schematic entry. If you or others are interested, I can do a short and sweet, really practical, Verilog tutorial. The non-academic kind that gets you up and running in no time. Mariss |
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#7
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| I assume you bought a CoolRunner II development board? If not, spend $29 or so and get one now. It will be invaluable for any tutorial. Check at Xylinx; they are always running some ridiculous deal (ISE, development board, power supply and USB programming cable kit from Digilent). These things are $29 on promotion, $49 when not (www.digilent.com). Mariss |
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#9
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You just fell off your pedistal:}) The correct link is: http://www.digilentinc.com/ Have a good day.
__________________ Art AKA Country Bubba (Older Than Dirt) |
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#11
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In the XC2C32A documentation, they talk about programming using VCCAUX rather than VCCIO. Which is correct or does it not make any difference? Alan
__________________ http://www.alansmachineworks.com |
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#12
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| I want a Mariss made tutorial about CPLD, I enjoy every time you write technical stuff, and your writings lately include CPLD a lot. I learned to program PIC microcontrollers, and these seem to be nice devices to know something about. If you commit to writing I buy a coolrunnerII (sold out at xilinx Edit: available here )to learn along.Thanks! Pablo Last edited by PEU; 03-02-2009 at 09:42 AM. |
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