CPLD breadboard

[Mariss Freimanis]

Hi,

I'm just throwing this out just in case anyone is interested. We use Xilinx CoolRunner II CPLDs (QFN32 and QFN48 packages) and 0603 size passives. Breadboarding a mixed digital / analog circuit is a pain in the rear with such small parts so I decided to do a general-purpose breadboard 2-layer plated-thru layout to ease the pain.

I'd be happy to post the gerber files in a week should someone have the same need. The board layout features:

1) Accepts an XC2C32A and an XC2C64A CPLD. The CPLDs can be concatenated (TDI to XC2C32A, XC2C32A TDO to XC2C64A TDI) or programmed as single CPLDs. Leadless 5mm and 7mm QFN 0.5mm pitch packages. Every CPLD I/O pin on each CPLD traces to a thru-hole pad.

2) 6 SOIC-8 dual op-amp and/or comparator locations. 10 0603 passives, 2 SOT-23-6 (accommodates 3, 4, 5 and 6 pin SOT-23s) per op-amp, 60 passives, 12 SOT-23s total. Each contact (2 / passive, 6 / SOT-23, 8 / SOIC) traces to a thru-hole pad.

3) Special circuit networks surround each CPLD. 0603 pads for two 8-bit R-2R DACs, four filtered inputs (0603 plull-up to 3.3V, 0603 RC lowpass to CPLD), four LED outputs (0603 R in series with 0603 LED to GND), four RC inputs (0603 to 3.3V, 0603 to GND), two RC oscillators (0603 R from two CPLD pins, 0603 C to GND for Schmidt inverter osc.) good to 10MHz.

Each CPLD Vsupply pin is bypassed by an 0603 cap in intimate proximity to CPLD.

4) 2X8 0.1" (2.54mm) header for off-board I/O. Each header pin terminates to an accessible thru-hole pad.

5) On-board 1.8V, 3.3V SOT-23 regulators, on-board 5V/12V SOT-89 regulator. All properly bypassed with 1206 and 0603 caps. Regulator chain: VDC in -> 5V/12V regulator -> 3.3V regulator -> 1.8V regulator.

6) Two 6mm trimpots terminated to 6 uncommitted thru-holes. Four SPST switches terminated to 2 uncommitted thru-holes each.

7) Ample GND, 3.3V and 5V/12V pads to service the breadboard. Four O'scope grounding clip loops and diode protected VDC in pads.

8) Holes for mounting four aluminum threaded stand-offs in each extreme corner of the breadboard. The standoffs are to prevent the breadboard from rocking on and compressing the wiring underneath the board. Board dimensions are 2" by 3.25" (51mm by 82.5mm). Advanced Circuits www.4pcb.com will be happy to get you 5 copies in 5 days at $33 each from these gerber files.

8) JTAG: The breadboard uses the standard Xilinx Impact parallel port programming cable pinout (GND, 3.3V, TDo, TCK, TMS and TDI). The 1X6 pad spacing is 2mm instead of 2.54mm.

9) About the thru-holes: Each thru-hole pad will accomodate 3 AWG-30 tinned bare copper wire (0.01" or 0.25mm). The expectation is you will place the 0603 passives, QFN CPLDs, SOT-23s, SOIC-8s and other parts on the top side of the breadboard. You will wire the breadboard from the bottom side using tinned copper wire insulated with appropriate gage Teflon sleeves cut to length. The tinned wires will be hand-soldered after placement in the thru-holes.

10) What you will need: AWG-30 tinned wire (0.025mm dia), Teflon tubing (>0.01" ID dia, 0.25mm), a bunch of 0603, SOIC-8, SOT-23 and QFN package parts, a hot-air rework station (or excellent quality soldering skills) and a fine-tip (0.5 to 0.8mm) soldering iron. Don't even think about it unless you are well versed in Verilog (or other), can design mixed-signal circuits and posses a good oscilloscope.

The breadboard layout is distilled from my aggravation with the capability of standard perf-board and other standard breadboards with the demands of real life high speed circuits on surface mount multi-layer printed circuits. Increasingly one has very little to do with the other; just try to do a CPLD on a perf-board and you will see what I mean.

My expertise is with motor drive design. That means my work is primarily mixed-signal, digital / analog circuit design. Analog is usually slow, modern digital is fast. You can't mix the two on a perf-board (analog happy, digital not happy at all). What is needed is a breadboard that takes care of real-world analog SMT circuits (0603), yet has the groundplane and power distribution needed for noise-free digital circuit. This breadboard should do it.

Mariss

[tecfacet]

hello,

i would be interested in getting the gerbers to have your cpld design board made.

thank you for your cpld tutorial. i have learned much.

roger