Parallel port input pin high/low

[mike944]

Hey guys,

Quick question. do ALL pc parallel ports hold all of their input pins high in the "default" state, and wait for them to be pulled low by external circuitry? Or is this a behavior of only some parallel ports?

I've got 10k pulldowns on my input pins to prevent float, but when i disable the electronics of my interface completely (removing all active highs and lows), the input pins all jump high, even though they have high-resistance pulldowns. This tells me that the parallel port is intentionally pulling them high.

I get this behavior on my PC, but i am trying to figure out if this behavior is universal, or not. Perhaps it is software controlled? I'm currently trying to run mach

Thanks,
Mike

[vger]

There are different flavors of ports. And most nowdays can operate in different modes. Those modes are:

SPP Standard Printer Port
EPP Enhanced Parallel Port
ECP Extended Capabilities Port

and then there was the PS/2 type

BPP Bi-directional Parallel Port

You will not find an ECP port on a PCI interface card becuase the ECP type is driven by DMA transfers which is not supported by the PCI interface. Most of us are using the EPP mode.

You may be able to tell what internal pull up your card has by simply measuring it. Power off the computer and measure resistance from the input pin to the +5 volt supply in the computer. If it's 4.7K and you are pulling it down with a 10K, then you are not getting it below the "low level threshhold".

Another thing you may try is to connect a pot to the pin and ground and vary the resistance while monitoring the state of the input pin. When it drops to low, just disconnect the pot and measure the resistance. That will tell you what resistance you need on the pull-down to keep it low.

The input pin is generally held high by a pullup so that open collector outputs in connected devices can be used to control them.

Steve

[mike944]

Originally Posted by vger ...............The input pin is generally held high by a pullup so that open collector outputs in connected devices can be used to control them............

That's the bit of information i'm really looking for. I should have asked my question a little clearer.


I don't specifically need to pull them down if they are purposely being held high. I just need them in some known state, instead of floating. That's what my pulldowns were for. to make sure i had a known state, instead of floating. Now that i understand the parallel port input pin behavior better, i may remove the pulldowns on the input pins all together.


I guess now my only question remaining is in that statement above is it "generally held high"? or "ALWAYS held high"? Basically, is there any chance of running across a parallel port that relies on external devices to hold them high?

[pminmo]

Assuming the PC is on, the output pins of the parallel port when set in an output state will be driving so if they are set low they will be sinking current, if set high they will be sourcing current. As vger posted, there are multiple setups for parallel ports and some of the setups the data lines can be bidirectional. Pullups or pulldowns on a device connected to the parallel port would come into play when the pc is off or disconnected. When the pc is on, termination of the lines for better transmission characteristics is normal.

[mike944]

INPUTS

I'm interested in the conventional inputs (10,11,12,13 & 15). I know how the outputs work. You can't "set a state" for the inputs from the PC end. It seems the state is set by internal hardware. Just trying to understand if this behavior is universal

[vger]

There is a standard IEEE 1284 that defines what a port must adhere to in order to be "standard" http://www.fapo.com/1284elec.htm

Since pins 10,11,12,13,14,&15 are only input, one could assume that as long as the physical port in question adheres to the IEEE 1284 standard, there will be a pullup at the input.

I came across this site http://www.beyondlogic.org/index.html
(pminmo, you may want to add that one to your links)

Hope that helps

Steve

[pminmo]

Ahh, rereading your post I suspect your problem is the 10K pulldown. Depending on the age of the PC will depend on the technology used in the interface chip. But I suspect what your seeing is the normal input current causing a voltage shift through your pull down. For example a 74lsxx chip may have 400ua input current. At 10K, that could develop 4V. Lower the pulldown value and see if that solves your problem.

[mike944]

thanks for that link to the 1284 standard.

I wish i had read that earlier. My implementation does not match the reccomended configuration. Instead of 1.2k pull-ups to +5, i've pulled everything down to 0 with 10k's

pminmo - i'm not really having a "problem" with the behavior, i just needed to understand it.

Basically, what i have is an isolated interface, that i'm trying to implement an E-stop circuit so the PC knows when the E-stop is pressed. I won't get into any stories about interface details, but basically, all i have to use for this is a +5v supply from the machine that goes to zero when the e-stop is pressed. That same +5v supply is also the PC-side supply (through an isolated DC-DC converter) so when the machine goes into e-stop, i no longer have power available to run any circuitry on the interface. I wanted a "clean" interface, so didn't want to use an extra cable to plug into USB that didn't really do anything, except borrow power. The isolated DC-DC converter to power the PC-side of the interface has been working very well, except that when the e-stop is pressed, i loose power to both sides of the isolation barrier.

It hasn't really been a problem, because when the e-stop is pressed, all my input lines jump high. This works pretty effectively to tell the PC that e-stop was pressed. I just need to make 100% sure this behavior will be consistent from PC to PC, before i can trust it to be repeatable for something fairly important like an e-stop.

By the way, i'm using Analog Devices' digital isolators, and when they loose power, they default to a floating state. They no longer pull the input pins down, and they all jump high.

On second thought, i can probably use a small SPDT reed-relay or something similar to take one of the input pins low when there is no power. Something that defaults to a closed state with no power.