MOSFET Gate Drive Circuit

[epineh]

I have been trying to learn a little about switching MOSFET's correctly, I have been reading through International Rectifier's application note # an-944 and I think a little has sunk in, but I have a few questions (of course ):

1 : The paragraph under fig.2 reads : The importance of the gate charge data to the designer is illustrated
as follows. Taking the charge are required to switch a previous
example, about 15 nanocoulombs of gate if 1.5 amps is supplied to the
gate, the device will be drain voltage of 80 volts and a drain current
of 12 amps. Since the 15 nC gate charge is the product of the gate
input current and the switching time, switched in 10 nS. It follows
that if 15 mA is supplied to the gate, then switching occurs in 1 us,
and so on. These simple calculations immediately tell the designer the
trade-offs between the amount of current available from the drive
circuit and the achievable switching time. With gate charge known,
the designer can develop a drive circuit appropriate to the switching
time required.

Is the value of 1.5 amps a misprint ? I can understand if they meant to write 1.5 milli-amps as this is a tenth of the 15 mA value that switches 10 times faster. And a gate current of 1.5 amps seems, well crazy.

2. It goes on to read :

Consider a typical practical example of a 100 kHz switcher, in which
it is required to achieve a switching time of 100 nanoseconds.
The required gate drive current is derived by simply dividing the gate charge, 15 X 10-9, by the required switching time, 100 X
10-9, giving 150 mA. From this calculation, the designer can further arrive at the drive circuit impedance. If the drive circuit
applies 14 volts to the gate, for instance, then a drive impedance of about 50 ohms would be required. Note that throughout the
“flat” part of the switching period (Figure 3), the gate voltage is constant at about 7 volts. The difference between the applied 14
volts and 7 volts is what is available to drive the required current through the drive circuit resistance.

I can mostly understand what is being said, now what I want to know is that I wish to use IRFZ44's for my application, and from the datasheet, the Typical Gate Charge Vs. Gate-to-Source Voltage plot shows the "flat spot" after the gate to source capacitance is charging, which as I understand is the gate to drain capacitance (or Miller capacitance) charging, holds at around 5 volts, so can I substitute this into the above calculations, instead of 7volts, along with the differences in gate charge, switching freq etc. to arrive at a reasonable drive circuit impedance ?

3. OK so after all of that is it acceptable to have a blocking diode in parallel with the gate resistor for fast turn-off without a resistor in series with the diode/resistor network ? I have heard mention of having the series resistor half the value of the resistor in parallel with the diode, and I have also seen schematics with no series resistor.

I understand that there will not be one answer for every application but this application will be for standard CNC servo type H-Bridge use, 20KHz.

Sorry for the long winded post, thanks in advance for any help offered.

Russell.

P.S. Attached Ap. Note

[NC Cams]

We switched 6 IRFZ40 fets mounted in parallel at 3khz and used a simple, low power voltage controlled oscillator to provide 15-18vdc.

You can take a 555 and rig it up as a charge pump and provide enough current to do the same thing. The 1.5 amps is not continuous but momentaryb which could be your sticking point.

We drove IRFZ40's with op amps (LM324) to full enhanced mode at 60hz and the amps couldn't drive 1.5 amps to save their ass on a good day.

From my experience, and to bypass all the math, if you have a stiff source of voltage (easy to do in a servo amp) and a good set of drivers (IR makes fet drivers that easily drive at the prescribed robustness), you should be able to drive your fets into full enhancement without needing a tremendous amount of current (probably way less than you can imagine - our circuits ran fine at 3 khz and they had 1 amp 5v regulator IC's that fed them and we used oscillators to generate the 18vdc needed to drive the fets. We ran them with simple totem poles and sometimes TTL gates as fet drivers didn't exist at the time.

[Mariss Freimanis]

The 1.5A number is correct. 1.5A supplies 15nC in 10nS, 15mA (100-times less current) will supply a 15nC charge in 1uS (100-times longer).

Switching a MOSFET in 10nS is appealing but can lead to problems. The intrinsic drain to source diode is actually the base to collector junction of a parasitic NPN transistor. The NPN is nearly shorted (a few Ohms) base to emitter; extremely fast switching drain to source can induce sufficient current in the NPN's Miller capacitance and forward bias the base to emitter junction. What then ensues is the destruction of the MOSFET. Warning bells should go off if the drain to source dv/dt exceeds 20 to 30 V/ns.

For that reason I prefer to use about 100mA gate drive to limit switching times to no less than 100nS, keeping dv/dt under 2 to 3 V/ns.

Mariss

[epineh]

Yup I totally missed the 10ns and 1us (my bad)

I will be using driver chips for this layout, I would just like to understand whats going on a little better rather than "copy and pasting" other people's design's, which hasn't helped my understanding so far

So if we keep the gate drive to 100mA what about the diode in parallel with the gate resistor ? Does that need to have a limiting series resistor or is it OK to leave for fast turn off times ?

Russell.

[Mariss Freimanis]

Ordinarily you want the gate discharge current to be higher than the charge current. This is because the gate threshold voltage is between 2 to 4VDC while the gate drive voltage should be around 10 to 12VDC. It takes longer going from 12V to 4V (discharge) as it does to go from 0V to 4V (charge). For that reason a diode is paralleled across the gate current limit resistor.

Since you mentioned monolithic gate drivers, this asymmetrical drive requirement is included in the driver IC. Take a look at IR gate drivers. The source current is typically half the sink current (120mA/240mA) so diodes aren't necessary.

Mariss

[epineh]

Cheers Mariss, armed with this information I can hopefully keep in a little of that smoke that wants to escape soooo bad.

Russell.

[Mariss Freimanis]

Smoke doesn't happen to good people.:-)

Mariss

[NC Cams]

Not knowing any better, we simply switched fets on and off FAST in some battery charger and speed control circuits we played with in our R/C car days. Use diodes and gate resistors? No room on the PCB as everything was done to save weight and cost and size.

The FAST switching of (fortunately) non-inductive loads on the nicad chargers led to some real interesting circuit "ringing" issues. Although we didn't PLAN it that way, we ended up creating psuedo "reflex chargers" from the momentary negative currents we found ourselves inducing in the systems. Nicads seem to like that style of charge technique - pulse charge pulses interspersed with negative discharge pulses.

Again, not knowing better, we switched the motors that way too - fast and hard. We had recurring problems frying fets but, we simply fed the things parts - that was easier than finding someone who'd design a good circuit for us. They ran, and ungodly fast, so why bother. THen again, we were only running at 3khz which may have made life easier on the fets, but we were pulling MASSIVE amps at low voltage (20 to 40 at 3-7vdc followed by reverse voltage dumps across the fets when the motors were driven as generators for "brakes").

At least I now know why we hurt so many IRFZ40's and SMP60NO5's back in the day......

[epineh]

Originally Posted by Mariss Freimanis Smoke doesn't happen to good people.:-) Mariss

I must be bad then, it got out last weekend, took out my FPGA card, driver board, and PC...

So now I am a little more cautious, live and learn as they say

Russell.

[MaX-MoD]

the easyest way to drive a MOS (or a IGBT) is to use... a MOS driver!
who would have bet?

these chips are cheap, fairly available (and even in free samples at ON) and do the job right.
more and more of these drivers can handle more than 600V High to Low bridge voltage, feature dead time security, desaturation detection (for IGBT) over temp protection etc etc.
for less than 1$ it makes a good and easy to deseign H bridge driver that won't blow the MOS at your face... difficult to do with regular components, espatially If you have High voltage implied (a single optocoupler fast and strong enought can cost more than 1$).

Don't forget that it's not because you have a 1.5A driver and 15nC chage that it will be swiched in 10nS!
the MOS itself has a switching time, often over 100ns; so you have to choose the right driver for the right MOS!

but, eh, for the dV/dT destructiveness, I'm kinda doubtfull...
isn't it rather the gate-source overvoltage that triggers the bipolar transistor effect?

free running diodes that are included in the MOS has a dV/dT breakdown limit, but the gate?
or maybe I missed simething in all those app notes and books I read about MOS...

[Mariss Freimanis]

Gate to source overvoltage only triggers gate oxide rupture and nothing else (other than a dead MOSFET).

Mariss

[MaX-MoD]

so a huge dVgs/dT does distroy or not the mos?